Until recently, most of the integrated circuits were designed to operate with a single 5 V power supply voltage. But with the advent of portable PCs and energy efficient "green" PCs, many integrated circuits now have to be able to operate at both 3.3 V and 5 V. It is usually not a problem for digital circuits as long as the circuits can operate at the required clock frequency at 3.3 V. But for analog circuits, operating at a different supply voltage can be a complicated issue, especially for the analog phase-locked loops (PLL). For example, the frequency range of a PLL usually has a strong dependency on the power supply voltage. FIG. 1 shows a typical PLL circuit known in the art. As shown in FIG. 2A-2B, a PLL designed for 3.3 V operation can be too fast for 5 V operation, especially if variations in temperature and process conditions are also taken into account. Similarly, a PLL designed to operate at 5 V can be too slow if operated at 3.3 V.
It is an object of the present invention to provide a method for adjusting the frequency range of a PLL based on supply voltage so that the same PLL design can operate at different supply voltages.
It is yet another object of the present invention to provide a PLL that can operate at both 3.3 V and 5 V.